Journal Papers

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Contents

2011

  • X. Guan and Y. Fei, “Register file partitioning and re-compilation for register file power reduction,” ACM Trans. on Design Automation of Electronic Systems, vol. 15, no. 3, May 2010.

2010

  • H. Lin and Y. Fei, “Orchestrating horizontal parallelism and vertical instruction packing of programs to improve system overall efficiency,” IEEE Trans. on Computers, vol. 58, no. 9, pp. 1211-1220, Sept. 2009.
  • X. Guan and Y. Fei, “Register file partitioning and compiler support for reducing power consumption in embedded processors,” IEEE Trans. on VLSI, vol. 18, no. 8, pp. 1248 - 1252, Aug. 2010.
  • T. Hu and Y. Fei, “QELAR: A machine-learning-based adaptive routing protocol for energy efficient and lifetime-extended underwater sensor networks,” IEEE Trans. on Mobile Computing, vol. 9, no. 6, June 2010.
  • X. Guan, Y. Fei, and H. Lin, “Hierarchical design of an application-specific instruction set processor for high-throughput and scalable FFT processing,” IEEE Trans. on VLSI, vol. 20, no.3, pp. 551-563, Mar. 2012.

2009

  • H. Lin, Y. Fei, X. Guan, and Z. J. Shi, “Architectural enhancement and system software support for program code integrity monitoring in application-specific instruction set processors,” IEEE Trans. on VLSI,vol. 18, no. 11, pp. 1319 - 1332, Nov. 2010.

2008

2007

2006

2005

2004





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