Journal Papers

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2014

B. Jiang and Y. Fei, “Smart home in smart microgrid: A cost-effective energy ecosystem with intelligent hierarchical agents,”IEEE Trans. on Smart Grid, vol. 6, no.1, pp.3-13, Jan. 2015.
A. A. Ding, L. Zhang, Y. Fei, and P. Luo, “A statistical model for higher order DPA on masked devices,” IACR ePrint, 2014/433. (https://eprint.iacr.org/2014/433.pdf).
Y. Fei, A. A. Ding, J. Lao and L. Zhang, “A statistics-based fundamental model for side-channel attack analysis,” IACR ePrint, 2014/152. (https://eprint.iacr.org/2014/152.pdf).

J. C. Martinez Santos and Y. Fei, “Leveraging speculative architectures for run-time program validation,” ACM Trans. on Embedded Computing Systems, vol. 13, no.1, Aug. 2013.

H. Lin and Y. Fei, “Resource sharing of pipelined custom hardware extension for energy-efficient application-specific instruction set processor design,” ACM Trans. on Design Automation of Electronic Systems, vol. 17, no.4, Oct. 2012.
H. Lin, T. Hu, and Y. Fei, “Utilizing custom registers in application-specific instruciton set processors for register spill elimination,” ACM Trans. on Design Automation of Electronic Systems, vol. 17, no.4, Oct. 2012.
X. Guan, Y. Fei, and H. Lin, “Hierarchical design of an application-specific instruction set processor for high-throughput and scalable FFT processing,” IEEE Trans. on VLSI, vol. 20, no.3, pp. 551-563, Mar. 2012.

H. Lin, Y. Fei, X. Guan, and Z. J. Shi, “Architectural enhancement and system software support for program code integrity monitoring in application-specific instruction set processors,” IEEE Trans. on VLSI,vol. 18, no. 11, pp. 1319 - 1332, Nov. 2010.

X. Guan and Y. Fei, “Register file partitioning and compiler support for reducing power consumption in embedded processors,” IEEE Trans. on VLSI, vol. 18, no. 8, pp. 1248 - 1252, Aug. 2010.

T. Hu and Y. Fei, “QELAR: A machine-learning-based adaptive routing protocol for energy efficient and lifetime-extended underwater sensor networks,” IEEE Trans. on Mobile Computing, vol. 9, no. 6, June 2010.

X. Guan and Y. Fei, “Register file partitioning and re-compilation for register file power reduction,” ACM Trans. on Design Automation of Electronic Systems, vol. 15, no. 3, May 2010.

H. Lin and Y. Fei, “Orchestrating horizontal parallelism and vertical instruction packing of programs to improve system overall efficiency,” IEEE Trans. on Computers, vol. 58, no. 9, pp. 1211-1220, Sept. 2009.

Y. Fei, L. Zhong, and N. K. Jha, “An energy-aware framework for dynamic software management in mobile computing systems,” ACM Trans. on Embedded Computing Systems, vol. 7, no. 3, Apr. 2008.

Y. Fei, S. Ravi, A. Raghunathan, and N. K. Jha, “Energy-optimizing source code transformations for operating system driven embedded software,” ACM Trans. on Embedded Computing Systems, vol. 7, no. 1, Dec. 2007.

Y. Fei and N. K. Jha, “Integrated functional partitioning and synthesis for low power distributed systems of systems-on-a-chip,” invited paper, Special Issue on Hardware-software Codesign for SOC in Int. Journal Embedded Systems, Vol.1, Nos.1/2, pp.2-13, 2005.

J. Luo, L. Zhong, Y. Fei, and N. K. Jha, “Register binding based RTL power management for control-flow intensive designs,” IEEE Trans. on Computer-aided Design of Integrated Circuits and Systems, vol. 23, no. 8, Aug. 2004.

Y. Fei, S. Ravi, A. Raghunathan, and N. K. Jha, “A hybrid energy estimation technique for extensible processors,” IEEE Trans. on Computer-aided Design of Integrated Circuits and Systems, vol. 23, no. 5, pp. 652-664, May 2004.

Y. Fei, X. Zheng, H. Zhang, Y. Guo, and B. Zhou, “A novel scheme of power equalization and power management in WDM all-optical networks,” IEEE Photon. Technol. Lett., vol. 11, no. 9, pp.1189-1191, Sept.1999.

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